CSS 422(CSS422) Final Project: 68K Disassembler
Project Description
• See the canvas for the project description• Progress reports
• Confidential evaluation
• Specification (how to program, etc.)
• Deliverable (what to submit, when, how)
• Simulator issues and Easy68k bug report (reported by students from previous
class)
• Grading standards
• Required op-code and EA
• Addendum (additional information, will be continuously updated)
What is a disassembler?
• Disassembler (also called an Inverse Assembler):
– Scans a section of memory, and
– Attempts to convert the memory’s contents to a listing of valid
assembly language instructions
• Most disassemblers cannot recreate symbolic, or label information
• Disassemblers can be easily fooled by not starting on an instruction
boundary
• How it works:
– The disassembler program parses the op-code word of the
instruction and then decides how many additional words of
memory need to be read in order to complete the instruction
– If necessary, reads additional instruction words
– The disassembler program prints out the complete instruction
in ASCII-readable format
• Converts binary information to readable Hex
• Disassembler (also called an Inverse Assembler):
– Scans a section of memory, and
– Attempts to convert the memory’s contents to a listing of valid
assembly language instructions
• Most disassemblers cannot recreate symbolic, or label information
• Disassemblers can be easily fooled by not starting on an instruction
boundary
• How it works:
– The disassembler program parses the op-code word of the
instruction and then decides how many additional words of
memory need to be read in order to complete the instruction
– If necessary, reads additional instruction words
– The disassembler program prints out the complete instruction
in ASCII-readable format
• Converts binary information to readable Hex
• Source file contains symbolic names for numerical values, comments,
symbol names for memory locations (variables)
• Source file does not contain detailed memory location information
symbol names for memory locations (variables)
• Source file does not contain detailed memory location information
• List file contains symbolic names for numerical values, comments,
symbol names for memory locations (variables)
• List file also contains detailed memory location information not found in
source file, including line numbers, other cross-reference information, and object
code
symbol names for memory locations (variables)
• List file also contains detailed memory location information not found in
source file, including line numbers, other cross-reference information, and object
code
Important! Testing Your Code!
Remember this page! You will check this page many times!
Assume that you have your disassembler program ready.
1. Write a testing source code (testing.X68 testing.S68)
• List all the required opcode and EA
• Any non-required opcodes to see if your program can catch it as invalid
data
2. Run your disassembler program from the source file
3. Your program will open in the simulator program
4. In the simulator, go to FileOpen Data
5. Choose the “testing.S68” file as a testing file
6. Then, the assembled testing file will be loaded into your memory
7. See where the “data” is loaded
8. Go to RunLog Start to have a log file
9. Run your program, and give the starting and ending address when prompt
($7FC0 and $814F, for example)
10.Should show one screen of data at a time, hitting the ENTER key should
display the next screen
Remember this page! You will check this page many times!
Assume that you have your disassembler program ready.
1. Write a testing source code (testing.X68 testing.S68)
• List all the required opcode and EA
• Any non-required opcodes to see if your program can catch it as invalid
data
2. Run your disassembler program from the source file
3. Your program will open in the simulator program
4. In the simulator, go to FileOpen Data
5. Choose the “testing.S68” file as a testing file
6. Then, the assembled testing file will be loaded into your memory
7. See where the “data” is loaded
8. Go to RunLog Start to have a log file
9. Run your program, and give the starting and ending address when prompt
($7FC0 and $814F, for example)
10.Should show one screen of data at a time, hitting the ENTER key should
display the next screen
Some Representative Milestones
1. Team is organized
2. Team meets to discuss and set
expectations and team values
3. Team decides who does what
4. Development schedule is created
5. Test program is built
6. Team meets and decides on API’s
7. I/O skeleton is complete, will
display all memory as data
8. NOP is decoded
9. Other op-codes and effective
address modes are added
10. Team meets regularly to check
status, integrate SW
11.Begin abuse testing, start write-up
12.Complete personal statements
13.Complete all deliverables, pack
everything up, cross your fingers
and study for the final!
1. Team is organized
2. Team meets to discuss and set
expectations and team values
3. Team decides who does what
4. Development schedule is created
5. Test program is built
6. Team meets and decides on API’s
7. I/O skeleton is complete, will
display all memory as data
8. NOP is decoded
9. Other op-codes and effective
address modes are added
10. Team meets regularly to check
status, integrate SW
11.Begin abuse testing, start write-up
12.Complete personal statements
13.Complete all deliverables, pack
everything up, cross your fingers
and study for the final!
General Program Flow
1. I/O subroutines prompt user (me) for a starting and ending address in memory
2. User enters starting and ending addresses for region of memory to be
disassembled
3. I/O subroutines check for errors and if address are correct, prepare the display
buffer and send address in memory to Op-Code routines
4. Op-Code subroutines can either decode word to legitimate instruction or
cannot.
1. If word in memory cannot be decoded to legitimate instruction, I/O
routines writes to screen: XXXXXXXX DATA YYYY, where
XXXXXXXX is the memory address of the word and YYYY is the hex
value of the word
2. If it can be decoded then it is prepared for display and the EA information
is passed to the EA routines
5. EA subroutines decode EA field(s) and
1. If EA cannot be decoded, signals this back, or
2. Prepares operands for display
6. Once the instruction is displayed, process repeats itself
1. I/O subroutines prompt user (me) for a starting and ending address in memory
2. User enters starting and ending addresses for region of memory to be
disassembled
3. I/O subroutines check for errors and if address are correct, prepare the display
buffer and send address in memory to Op-Code routines
4. Op-Code subroutines can either decode word to legitimate instruction or
cannot.
1. If word in memory cannot be decoded to legitimate instruction, I/O
routines writes to screen: XXXXXXXX DATA YYYY, where
XXXXXXXX is the memory address of the word and YYYY is the hex
value of the word
2. If it can be decoded then it is prepared for display and the EA information
is passed to the EA routines
5. EA subroutines decode EA field(s) and
1. If EA cannot be decoded, signals this back, or
2. Prepares operands for display
6. Once the instruction is displayed, process repeats itself
Required Op-code and EA
• Not all op-codes/EA are required to disassemble
Required op-codes and addressing modes:
Instructions:
NOP
MOVE, MOVEQ, MOVEM, MOVEA
ADD, ADDA,ADDQ
SUB
LEA
AND,OR,NOT
LSL, LSR, ASL, ASR
ROL,ROR
Bcc (BGT, BLE, BEQ)
JSR, RTS
BRA
• Not all op-codes/EA are required to disassemble
Required op-codes and addressing modes:
Instructions:
NOP
MOVE, MOVEQ, MOVEM, MOVEA
ADD, ADDA,ADDQ
SUB
LEA
AND,OR,NOT
LSL, LSR, ASL, ASR
ROL,ROR
Bcc (BGT, BLE, BEQ)
JSR, RTS
BRA
